整理初版
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160
third_party/asmjit/core/archtraits.cpp
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160
third_party/asmjit/core/archtraits.cpp
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// This file is part of AsmJit project <https://asmjit.com>
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//
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// See asmjit.h or LICENSE.md for license and copyright information
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// SPDX-License-Identifier: Zlib
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#include "../core/api-build_p.h"
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#include "../core/archtraits.h"
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#include "../core/misc_p.h"
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#if !defined(ASMJIT_NO_X86)
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#include "../x86/x86archtraits_p.h"
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#endif
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#if !defined(ASMJIT_NO_AARCH64)
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#include "../arm/a64archtraits_p.h"
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#endif
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ASMJIT_BEGIN_NAMESPACE
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static const constexpr ArchTraits noArchTraits = {
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// SP/FP/LR/PC.
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0xFF, 0xFF, 0xFF, 0xFF,
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// Reserved,
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{ 0, 0, 0 },
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// HW stack alignment.
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0,
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// Min/Max stack offset.
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0, 0,
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// ISA features [Gp, Vec, Other0, Other1].
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{{
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InstHints::kNoHints,
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InstHints::kNoHints,
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InstHints::kNoHints,
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InstHints::kNoHints
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}},
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// RegTypeToSignature.
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#define V(index) OperandSignature{0}
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{{ ASMJIT_LOOKUP_TABLE_32(V, 0) }},
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#undef V
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// RegTypeToTypeId.
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#define V(index) TypeId::kVoid
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{{ ASMJIT_LOOKUP_TABLE_32(V, 0) }},
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#undef V
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// TypeIdToRegType.
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#define V(index) RegType::kNone
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{{ ASMJIT_LOOKUP_TABLE_32(V, 0) }},
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#undef V
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// Word names of 8-bit, 16-bit, 32-bit, and 64-bit quantities.
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{
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ArchTypeNameId::kByte,
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ArchTypeNameId::kHalf,
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ArchTypeNameId::kWord,
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ArchTypeNameId::kQuad
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}
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};
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ASMJIT_VARAPI const ArchTraits _archTraits[uint32_t(Arch::kMaxValue) + 1] = {
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// No architecture.
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noArchTraits,
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// X86/X86 architectures.
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#if !defined(ASMJIT_NO_X86)
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x86::x86ArchTraits,
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x86::x64ArchTraits,
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#else
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noArchTraits,
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noArchTraits,
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#endif
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// RISCV32/RISCV64 architectures.
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noArchTraits,
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noArchTraits,
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// ARM architecture
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noArchTraits,
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// AArch64 architecture.
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#if !defined(ASMJIT_NO_AARCH64)
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a64::a64ArchTraits,
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#else
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noArchTraits,
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#endif
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// ARM/Thumb architecture.
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noArchTraits,
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// Reserved.
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noArchTraits,
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// MIPS32/MIPS64
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noArchTraits,
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noArchTraits
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};
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ASMJIT_FAVOR_SIZE Error ArchUtils::typeIdToRegSignature(Arch arch, TypeId typeId, TypeId* typeIdOut, OperandSignature* regSignatureOut) noexcept {
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const ArchTraits& archTraits = ArchTraits::byArch(arch);
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// TODO: Remove this, should never be used like this.
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// Passed RegType instead of TypeId?
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if (uint32_t(typeId) <= uint32_t(RegType::kMaxValue))
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typeId = archTraits.regTypeToTypeId(RegType(uint32_t(typeId)));
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if (ASMJIT_UNLIKELY(!TypeUtils::isValid(typeId)))
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return DebugUtils::errored(kErrorInvalidTypeId);
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// First normalize architecture dependent types.
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if (TypeUtils::isAbstract(typeId)) {
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bool is32Bit = Environment::is32Bit(arch);
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if (typeId == TypeId::kIntPtr)
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typeId = is32Bit ? TypeId::kInt32 : TypeId::kInt64;
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else
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typeId = is32Bit ? TypeId::kUInt32 : TypeId::kUInt64;
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}
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// Type size helps to construct all groups of registers.
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// TypeId is invalid if the size is zero.
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uint32_t size = TypeUtils::sizeOf(typeId);
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if (ASMJIT_UNLIKELY(!size))
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return DebugUtils::errored(kErrorInvalidTypeId);
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if (ASMJIT_UNLIKELY(typeId == TypeId::kFloat80))
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return DebugUtils::errored(kErrorInvalidUseOfF80);
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RegType regType = RegType::kNone;
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if (TypeUtils::isBetween(typeId, TypeId::_kBaseStart, TypeId::_kVec32Start)) {
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regType = archTraits._typeIdToRegType[uint32_t(typeId) - uint32_t(TypeId::_kBaseStart)];
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if (regType == RegType::kNone) {
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if (typeId == TypeId::kInt64 || typeId == TypeId::kUInt64)
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return DebugUtils::errored(kErrorInvalidUseOfGpq);
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else
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return DebugUtils::errored(kErrorInvalidTypeId);
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}
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}
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else {
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if (size <= 8 && archTraits._regSignature[RegType::kVec64].isValid())
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regType = RegType::kVec64;
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else if (size <= 16 && archTraits._regSignature[RegType::kVec128].isValid())
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regType = RegType::kVec128;
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else if (size == 32 && archTraits._regSignature[RegType::kVec256].isValid())
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regType = RegType::kVec256;
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else if (archTraits._regSignature[RegType::kVec512].isValid())
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regType = RegType::kVec512;
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else
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return DebugUtils::errored(kErrorInvalidTypeId);
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}
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*typeIdOut = typeId;
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*regSignatureOut = archTraits.regTypeToSignature(regType);
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return kErrorOk;
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}
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ASMJIT_END_NAMESPACE
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